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2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Hybrid multiplierless FIR filter architecture based on NEDA
Impulse response; LSI circuits; Programmable logic controllers; Adder tree; Critical Paths; Design methods; Distributed arithmetic; Fan-out; Finite-impulse response; FIR filter architecture; Hybrid structures; International conferences; Multiplierless; Proposed architectures; Trade offs; Very large-scale integration; FIR filters
This paper presents new hybrid multiplierless finite impulse response (FIR) architecture based on New Distributed Arithmetic (NEDA). The hybrid structure is a trade off between direct form and transposed direct form that results in a reduction of the critical path and the size of the delays elements as well as the fan-out. While the multiplications involved in the hybrid structure are replaced by a butterfly adder tree. Compared with previous methods, our proposed architecture achieves an average of 20%25 less additions. Moreover, the design method is simple and achieves better results than previous methods. © 2007 IEEE.
Generically Dependent Continuant
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