Source code metrics to predict the properties of FPGA/VHDL-based synthesized products Conference Paper uri icon

abstract

  • Current research on source code metrics is heavily focused on measuring quality attributes for object oriented source code, for common languages such as $C$ , Java and C#. However, source code metrics are good predictors and evaluators of software systems characteristics, thereby researchers have found other uses and applications for other computing related areas. In this research, source code metrics for Very High Speed Integrated Circuit Hardware Description Language (VHDL) are proposed and used to predict the synthesized product properties for Field Programmable Gate Array (FPGA) based digital systems. Code written in VHDL is used to generate a configuration file for a specific FPGA in a process named design synthesis. Physical properties of the FPG/VHDL based synthesized product are measured for performance evaluation in a testing process, but it can be a time consuming process. In this paper we aim to correlate source code metrics with the FPGA/VHDL based synthesized product properties, in order to determine if source code metrics can be used as predictors of certain synthesized product properties. A case of study correlating three source code metrics with three synthesized product properties is presented. The results of the study provide evidence that source code metrics can be used as predictors of FPGA/VHDL based synthesized product properties. © 2018 IEEE.
  • Current research on source code metrics is heavily focused on measuring quality attributes for object oriented source code, for common languages such as $C$%2b%2b, Java and C#. However, source code metrics are good predictors and evaluators of software systems characteristics, thereby researchers have found other uses and applications for other computing related areas. In this research, source code metrics for Very High Speed Integrated Circuit Hardware Description Language (VHDL) are proposed and used to predict the synthesized product properties for Field Programmable Gate Array (FPGA) based digital systems. Code written in VHDL is used to generate a configuration file for a specific FPGA in a process named design synthesis. Physical properties of the FPG/VHDL based synthesized product are measured for performance evaluation in a testing process, but it can be a time consuming process. In this paper we aim to correlate source code metrics with the FPGA/VHDL based synthesized product properties, in order to determine if source code metrics can be used as predictors of certain synthesized product properties. A case of study correlating three source code metrics with three synthesized product properties is presented. The results of the study provide evidence that source code metrics can be used as predictors of FPGA/VHDL based synthesized product properties. © 2018 IEEE.

publication date

  • 2019-01-01