CMOS digital pixel for binary morphological edge segmentation Conference Paper uri icon


  • A digital pixel for binary morphological image processing is presented. The pixel is designed to be integrated into a vision chip with parallel architecture, in order to compute edge segmentation. The pixel contains 11 transistors working with analog signal and 20 transistor working with digital signal; pixel layout size is 115.2μm x 89.4μm; fill factor is 1.85%25; 1.2μm CMOS standard technology from AMI is used for prototyping; random noise is 2.7m V; peak analog output signal to noise ratio is 44dB; optical dynamic range is 53dB; dark current is 11mV/s; processing time is 3.5 ms; maximum power dissipation is 264 μW. © 2007 IEEE.

publication date

  • 2007-01-01