Set-reset flip-flop circuit with a simple output logic Article

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Overview

abstract

• The equation of the plane (EOP) in analytic geometry is used to build a logic dynamic architecture, i.e., a combination of set-reset flip-flop (SR-FF) and basic logic gates. This is achieved by using two of the variables in the EOP as the input signals of the SR-FF and the remaining variable as the output signal. This theoretical proposal for mixing the SR-FF and the basic logic gates is confirmed experimentally by means of a simple electronic implementation. © Springer Science%2bBusiness Media, LLC 2011.

authors

• Campos Cantón Isaac
• Campos E.
• Castellanos-Velasco E.
• Rosu H.C.

publication date

• 2012-01-01

published in

• Circuits, Systems, and Signal Processing  Journal

Research

keywords

• Basic logic gates; Bistable multivibrator; Equation of the plane; Set-reset flip-flop Basic logic; Dynamic architecture; Electronic implementations; Equation of the plane; Input signal; Output signal; Set-reset flip-flop; Logic gates; Flip flop circuits

Identity

Digital Object Identifier (DOI)

• 10.1007/s00034-011-9343-4

Additional Document Info

start page

• 753

end page

• 760

volume

• 31

issue

• 2